1. Field of the Invention
The present invention relates to a solid-state imaging apparatus.
2. Description of the Related Art
In recent years, MOS type solid-state imaging apparatuses have come into widespread use for digital cameras and scanners. One of the reasons is that realization of a high S/N (signal to noise ratio) has been enabled. It is useful as one means for realizing a high S/N to provide a read circuit for each pixel column of a pixel matrix array with an output unit to a post-stage circuit such as an amplifier. By amplifying a signal with the amplifier for each pixel column, the amplification factor of the post-stage circuit can be suppressed to be low. Therefore, with amplification of a signal, the noise which occurs at the post-stage is not amplified greatly. As a result, the S/N can be enhanced.
In Japanese Patent Application Laid-Open No. 2003-228457 (hereinafter, Patent Document 1), the number of circuit elements is reduced and chip area is reduced by sharing the amplifier which is provided for each pixel column by a plurality of columns. In the aforementioned example, one amplifying circuit is shared by pixels of two columns.
The circuit operation is as follows. First, a plurality of sampling switches sharing the amplifier is brought into an ON state, and the reset signal from a pixel is clamped by a clamp capacitor (signal holding unit) with a reference voltage VREF of a differential amplifier as a reference. Next, the sampling switches of a plurality of pixel columns are simultaneously brought into an OFF state. Next, by bringing the sampling switch into an ON state for each pixel column, optical signals from the pixels are read out, and differential signals between the optical signals and reset signals are outputted from the amplifier.
However, when a transistor, which is a sampling switch, is brought into an OFF state in the above described operation, the potentials of the nodes at both ends of the sampling switch vary due to charge injection and clock field through. The potential variation of the node is sometimes superimposed on a signal as an offset component when the signal is held in the signal holding unit.
The waveform of the drive pulse which controls each sampling switch differs depending on the difference in wiring resistance due to asymmetry of the layout of the control wiring and a parasitic capacitor. In the transistor which is the sampling switch, the parasitic capacitor and the threshold value between the respective electrode regions vary. The extent of the potential variation due to charge injection and field through changes according to the waveform of the drive pulse of the transistor and the parasitic capacitor of the transistor. Variation of the potential of the node due to charge injection and field through differs depending on the timing at the time of turning the transistor to an OFF state and the pulse waveform.
When the output nodes of a plurality of transistors are commonly connected to the post-stage circuit, and timing of shifting to the OFF state differs among the transistors, or the pulse waveforms at the time of shifting to the OFF state differ, the charge distribution by charge injection and field through differs in the respective transistors. When the aforementioned charge distribution differs among the transistors, the aforementioned offset component differs at each signal holding unit. Variation of the offset component becomes a fixed pattern noise, and significantly degrades image quality. Further, variation of the offset component for a signal has a greater influence as the capacitance value of the signal holding unit is smaller.
As described above, the present inventors have found that a plurality of sampling switches provided to share the output unit such as an amplifier by signal holding units of a predetermined number cause the new problem that the offset component superimposed on the signal held by the signal holding unit varies.
The present invention is made in view of such a problem, and has an object to obtain a high image quality in a solid-state imaging apparatus in which, for example, an output unit is shared by signal holding units of a predetermined number.